[odc] Daily src changes for 2007-12-26

[ODC]

OpenBSD src changes summary for 2007-12-26
==========================================

sys/arch/hppa/include                   sys/arch/hppa/stand/boot
sys/arch/hppa/stand/cdboot              sys/arch/hppa/stand/libsa
sys/arch/m88k/fpu                       sys/arch/m88k/m88k
sys/arch/mvme88k/mvme88k                sys/arch/sparc64/sparc64

== sys =============================================================== 01/01 ==

  http://www.openbsd.org/cgi-bin/cvsweb/src/sys

arch/hppa/include

  ~ loadfile_machdep.h                    

  > Teach the hppa bootloader how to boot 64-bit kernels.
  > ok miod@, deraadt@ (kettenis@)

arch/hppa/stand/boot

  ~ conf.c                                

  > Teach the hppa bootloader how to boot 64-bit kernels.
  > ok miod@, deraadt@ (kettenis@)

arch/hppa/stand/cdboot

  ~ Makefile                              

  > Teach the hppa bootloader how to boot 64-bit kernels.
  > ok miod@, deraadt@ (kettenis@)

arch/hppa/stand/libsa

  ~ Makefile                              + elf32.c
  + elf64.c                               

  > Teach the hppa bootloader how to boot 64-bit kernels.
  > ok miod@, deraadt@ (kettenis@)

arch/m88k/fpu

  ~ fpu_arith.h                           

  > Fix FPU_SET_CARRY() (miod@)

  ~ fpu_compare.c                         

  > First try at getting the interval bits filled in fcmp{,u} results. (miod@)

  ~ fpu_implode.c                         

  > Honour the rounding mode in fpu_ftoi(). (miod@)

arch/m88k/m88k

  ~ m88k_machdep.c                        

  > Remove the last debug bit from the PSR on 88110: do not force memory
  > accesses
  > instructions to be serialized (this defeats the purpose of having a
  > superscalar
  > processor, and accesses to volatile variables are done with explicit memory
  > barriers anyway).
  > This brings a HUGE speedup: openssl speed -elapsed shows AES is 90% faster,
  > blowfish is 75% faster, and sha1 is 50% faster. Not so bad!
  > However, doing this increases the pressure on the processor bus, so it is
  > necessary to increase the processor bus timeout on 40MHz boards again (to
  > 256
  > usec). ``black cat'' 50MHz boards seem to be unaffected, so they remain at
  > 64 usec. (miod@)

arch/mvme88k/mvme88k

  ~ m88110.c                              

  > Since no cache flush/inval operation will occur before we enable D$, and
  > we never disable it, it is not necessary to check for D$ to be enabled
  > before acting. That's a few more cycles spared. (miod@)

  ~ m197_machdep.c                        ~ m88110.c

  > Remove the last debug bit from the PSR on 88110: do not force memory
  > accesses
  > instructions to be serialized (this defeats the purpose of having a
  > superscalar
  > processor, and accesses to volatile variables are done with explicit memory
  > barriers anyway).
  > This brings a HUGE speedup: openssl speed -elapsed shows AES is 90% faster,
  > blowfish is 75% faster, and sha1 is 50% faster. Not so bad!
  > However, doing this increases the pressure on the processor bus, so it is
  > necessary to increase the processor bus timeout on 40MHz boards again (to
  > 256
  > usec). ``black cat'' 50MHz boards seem to be unaffected, so they remain at
  > 64 usec. (miod@)

arch/sparc64/sparc64

  ~ trap.c                                

  > Use the TSTATE_xxx constants instead of (PSTATE_xxx << TSTATE_PSTATE_SHIFT)
  > for readability; ok kettenis@ (miod@)

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